The present invention relates to an apparatus for recording/reproducing digital information by using an information carrier, and more particularly to a technique for detecting jitter or asymmetry in a reproduced signal obtained from the information carrier.
A type of recording/reproduction apparatus which is capable of recording/reproducing digital information onto/from a removable recording medium is known in the prior art. An optical disk having a recording layer made of a phase change medium or a magneto-optical medium is widely used as the information carrier (or the recording medium).
For example, when digital information is recorded onto an optical disk having a phase change medium by using laser light, the optical disk is irradiated with laser light having a waveform as illustrated in FIG. 16A. As a result, marks are formed on the optical disk as illustrated in FIG. 16B, each having a length associated with the length of the corresponding piece of the recorded digital data. The marks recorded on the optical disk are read out by using laser light, thus producing a continuous analog signal as a reproduced signal, as illustrated in FIG. 16C. The reproduced analog signal is sliced at a predetermined level lv so as to be converted into a digital signal as illustrated in FIG. 16D, from which the original digital information is reproduced.
However, the shape of marks formed on the recording medium may vary due to the individual difference among different apparatuses or the individual difference among different recording media even if the digital information is recorded by using laser light of the same laser power and the same pulse waveform. A shift in the shape of a mark from the intended shape would result in a shift in the waveform of the reproduced analog signal and that of the converted digital signal from the intended waveforms, thereby degrading the quality of the reproduced signal. Thus, in the prior art, recording/reproduction apparatuses have a problem in that the quality of the reproduced signal from the recording medium may vary substantially for different apparatuses or recording media.
In order to prevent such degradation in reliability of the reproduced signal, the recording/reproduction apparatus performs a test recording operation or a calibration operation upon loading of the recording medium, for example. More specifically, the recording/reproduction apparatus records data having a known pattern in a predetermined area on the recording medium and reproduces the recorded data to measure the signal quality thereof. The recording/reproduction apparatus optimizes the characteristics of the reproduction system or the parameters relating to the recording operation (recording parameters) based on the measured signal quality.
The quality of a reproduced signal is determined based on, for example, the error rate and the jitter (fluctuations of the reproduced signal along the time axis). The recording/reproduction apparatus optimizes the characteristics of the reproduction system or the recording parameters so as to minimize the error rate and the jitter in the reproduced signal.
Particularly, in the case of a recording medium onto which information is recorded with heat by using laser light, or the like, heat interferences occur between adjacent recording patterns. As a result, the shape of a mark formed on the medium is likely to be different from the intended shape. When recording information onto such a recording medium, it is necessary to set the optimal recording parameters for the individual recording patterns.
The recording parameters include those varying in the direction of the time axis such as the recording pulse width and those varying in the direction of the reproduced signal amplitude such as the recording power as illustrated in FIG. 16A. Jitter can be used to evaluate those parameters which vary in the direction of the time axis of the recording pulse, whereas asymmetry in the reproduced signal can be used to evaluate those parameters which vary in the amplitude direction. When the recording power is not appropriate, there occurs asymmetry in the reproduced signal.
The structure of a conventional optical disk recording/reproduction apparatus which calibrates the recording parameters by using jitter and asymmetry in a reproduced signal will now be described with reference to FIG. 12 to FIG. 14.
As illustrated in FIG. 12, reflected light from an optical disk 1 is converted by a photodiode, or the like, in a pickup portion of an optical head 2 into an electric signal, thus reproducing an analog signal which corresponds to digital information recorded on the optical disk 1. The obtained reproduced signal is subjected to a waveform shaping operation by a waveform equalizer 3. The waveform-shaped reproduced signal is sliced at a predetermined level Vc by a digitization circuit 4 which includes a comparator 15 (see FIG. 13), etc. Thus, the reproduced signal is converted into a continuous digital or binary signal.
The digital signal output from the digitization circuit 4 is input to a PLL (Phase Locked Loop) circuit including a phase comparator 5, an LPF (Low Pass Filter) 6 and a VCO (Voltage-Controlled Oscillator) 7, and a reproduction clock signal is produced in the PLL circuit. In the phase comparator 5, the input digital signal and a clock signal output from the VCO 7 are compared with each other, thus detecting a phase error therebetween. The detected phase error is averaged by the LPF 6 which includes a capacitor, and the like, so as to be converted into a voltage for driving the VCO 7. Thus, by varying the driving voltage for the VCO 7 according to the value of the phase error, a feedback control is performed on the oscillation frequency of the VCO 7 so that the phase error output from the phase comparator 5 approaches zero. In this way, it is possible to produce a reproduction clock signal which is in synchronization with the digital signal.
Even when a PLL circuit is used so that a reproduction clock signal in synchronization with the digital signal is output from the VCO 7, as described above, a phase error still occurs between the digital signal and the reproduction clock signal due to the length of the recorded mark differing from the ideal length. A jitter detection circuit 11 integrates absolute values of phase errors output from the phase comparator 5 for a predetermined period of time or for a predetermined number of zero-crossing points so as to calculate a jitter amount. The jitter amount is calculated for each of the individual recording patterns.
The calculated jitter amount is transferred to a recording parameter setting circuit 12. The recording parameter setting circuit 12 determines whether a recording parameter such as the recording pulse width is appropriate based on the jitter amount which is input thereto. When it is determined that the recording parameter is not appropriate, a more appropriate recording parameter is estimated and output to a recording compensation circuit 9.
The recording compensation circuit 9 converts a recording pattern obtained from a pattern generation circuit 8 into a pulse waveform by using the recording parameter output from the recording parameter setting circuit 12. A laser driving circuit 10 records digital information onto the optical disk 1 according to the obtained pulse waveform. Then, the recorded digital information is reproduced again to determine a jitter amount as described above. The recording/reproduction apparatus continues to optimize the recording parameter until it is determined that the jitter amount is less than or equal to a predetermined level in the recording parameter setting circuit 12.
Next, a case where the calibration operation is performed based on asymmetry in a reproduced signal will be described. FIG. 13 illustrates the structure of a conventional asymmetry detection section. FIG. 14 illustrates an example of a reproduced signal which has asymmetry.
As illustrated in FIG. 13, the asymmetry detection section includes an asymmetry detection circuit 17, a peak-side envelope voltage detection circuit 13 and a bottom-side envelope voltage detection circuit 14. The asymmetry detection circuit 17 receives the slice level (center voltage) Vc which is used in the comparator 15 of the digitization circuit 4 illustrated in FIG. 12.
Assume that a continuous recording pattern in which the mark/space duty ratio is 50% has been recorded in a test recording operation for the purpose of asymmetry detection, and a reproduced analog signal as illustrated in FIG. 14 has been obtained. The peak-side envelope voltage detection circuit 13 detects a peak-side envelope voltage Vp of the reproduced signal, and the bottom-side envelope voltage detection circuit 14 detects a bottom-side envelope voltage Vb of the reproduced signal. Each of the envelope voltage detection circuits 13 and 14 may be a sample hold circuit.
The reproduced signal is sliced at the center voltage Vc by the comparator 15 so as to be converted into a digital signal. The center voltage Vc is controlled by a feedback control using an integration circuit 16 which is connected to the output side of the comparator 15. This is for correcting fluctuations in the reproduced signal due to extrinsic factors (such as fluctuations in the reflectance of the medium, etc.) so that the duty ratio of the digital signal output from the comparator 15 is 50%, utilizing the fact that the recorded digital information stream is free of direct current components (xe2x80x9cDC-freexe2x80x9d). When the center voltage Vc is shifted to be higher than the appropriate level, the on-duty ratio of the output digital signal is less than 50%. When the center voltage Vc is shifted to be lower than the appropriate level, the on-duty ratio of the output digital signal is greater than 50%.
The integration circuit 16, which is provided for the duty ratio control, averages the output digital signal to produce the center voltage Vc. As a result of such a feedback control, the center voltage Vc is set to a level such that the duty ratio of the digital signal output from the comparator 15 is 50%.
As a result, the above-described center voltage Vc differs from the mean amplitude level of the reproduced signal as illustrated in FIG. 14. The asymmetry detection circuit 17 receives the peak-side envelope voltage Vp, the bottom-side envelope voltage Vb and the center voltage Vc, and calculates an asymmetry amount As based on these voltages as shown in the following expression:
As=(Vp+Vb)/2xe2x88x92Vc
The detected asymmetry amount As is transferred to the recording parameter setting circuit 12 illustrated in FIG. 12. The recording parameter setting circuit 12 adjusts the recording power based on the value of the asymmetry amount As. Thus, the recording/reproduction apparatus calibrates the recording power so that the asymmetry amount is within the intended range.
By performing such a test recording and appropriately selecting the recording parameter based on the jitter amount or the asymmetry amount obtained from the reproduced signal, it is possible to record information under conditions such that a reproduced signal of a better quality can be obtained irrespective of the individual difference among different apparatuses or recording media.
In recent years, the recording density of a recording medium is increasing significantly. One method for reproducing information which has been recorded with a high density is a PRML (Partial Response Maximum Likelihood) method which is a combination of the partial response equalization (hereinafter, referred to as xe2x80x9cPR equalizationxe2x80x9d) and the Viterbi decoding (see U.S. Pat. No. 5,719,843). FIG. 15 illustrates a signal processing circuit based on a typical PRML method.
As illustrated in the figure, the signal processing circuit includes: an AGC (Automatic Gain Control) circuit 18 for adjusting the signal amplitude of the reproduced signal to a predetermined value; a waveform equalizer 19 for removing unnecessary high-band noise components to emphasize the necessary signal band; an A/D (Analog-to-Digital) converter 20 for sampling the reproduced signal with a channel clock (sampling clock); a digital filter 21 for equalizing the sampled data so that the frequency characteristic of recorded/reproduced signal processing system coincides with a predetermined PR equalization; a Viterbi decoder 22 for outputting the most likely digitization result from discrete sampled data (i.e., the digitization result which is most probably correct based on the preceding data point and the following data point); a phase comparator 23 for detecting a phase error from the discrete sampled data; an LPF 24 for extracting the reproduction clock signal; a D/A (Digital-to-Analog) converter 25 for converting the digital value output from the LPF 24 into an analog value; and a VCO 26.
In the signal processing circuit described above, the original digital information is reproduced from sampled data of multiple levels which are obtained by sampling and quantizing an analog reproduced signal using the A/D converter 20. The sampling clock used in the A/D converter 20 is controlled by a feedback control which is performed by calculating a phase error from the sampled data using the phase comparator 23 and by controlling the oscillation frequency of the VCO 26 based on the phase error. In this way, sampled data is produced with a sampling clock which is in synchronization with the reproduced signal.
When using an optical disk recording/reproduction apparatus which is based on the PRML signal processing method as described above, it is preferred to detect asymmetry and jitter in the reproduced signal to optimize recording parameters used in a recording operation. However, when the conventional detection circuits as illustrated in FIG. 12 and FIG. 13 are employed for the recording/reproduction apparatus, the total circuit scale increases undesirably. The conventional asymmetry detection circuit illustrated in FIG. 13 employs the peak-side envelope voltage detection circuit 13 and the bottom-side envelope voltage detection circuit 14 to detect the envelope voltages. The conventional jitter detection circuit 11 illustrated in FIG. 12 detects a jitter amount by obtaining the average of the absolute values of phase error detection pulse widths from the phase comparator 5, and requires an analog PLL circuit therefor. Thus, such a recording/reproduction apparatus which includes both of an analog signal processing circuit for optimizing the recording parameters and a digital signal processing circuit for compliance with the PRML method has a problem that the total circuit scale increases unnecessarily.
It is therefore an object of this invention to provide an apparatus and method capable of detecting a jitter amount in a reproduced signal from a plurality of sampled data which are obtained by sampling the reproduced signal.
Another object of the present invention is to provide an apparatus and method capable of detecting an asymmetry amount in a reproduced signal from a plurality of sampled data which are obtained by sampling the reproduced signal.
Still another object of the present invention is to provide a recording/reproduction apparatus for optimizing recording parameters by using such detection apparatuses.
An inventive apparatus of the present invention is an asymmetry detection apparatus for detecting asymmetry in a reproduced signal which is obtained by reproducing digital information recorded on an information carrier, the asymmetry detection apparatus including: a clock signal generator for generating a clock signal based on the reproduced signal; an A/D converter for sampling the reproduced signal in synchronization with the clock signal; a determiner for determining whether a level of each of a plurality of sampled data obtained by the sampling operation is equal to or greater than a predetermined level; and a detector for selecting predetermined ones of the plurality of sampled data based on an output from the determiner so as to detect asymmetry in the reproduced signal by using the selected determined ones of the plurality of sampled data.
In one embodiment of the present invention, the detector selects one of the plurality of sampled data which has a maximum value and another one of the plurality of sampled data which has a minimum value based on the output from the determiner.
In another embodiment, the detector detects asymmetry in the reproduced signal by accumulating the sampled data which has the maximum value and the sampled data which has the minimum value.
In still another embodiment, the determiner obtains polarity information of the sampled data, and the detector identifies one of the plurality of sampled data which has the maximum value and another one of the plurality of sampled data which has the minimum value based on the polarity.
In still another embodiment, the clock signal generator detects a phase error between the reproduced signal and the clock signal by using the sampled data so as to perform a feedback control on the clock signal based on the detected phase error.
Another inventive apparatus of the present invention is a recording/reproduction apparatus including: an asymmetry detection apparatus as described above; a recording parameter setting section for setting a recording parameter based on the asymmetry in the reproduced signal detected by the asymmetry detection apparatus; and a recording apparatus for recording digital information on the information carrier by using the recording parameter.
Still another inventive apparatus of the present invention is a jitter detection apparatus for detecting jitter in a reproduced signal which is obtained by reproducing digital information recorded on an information carrier, the jitter detection apparatus including: a clock signal generator for generating a clock signal based on the reproduced signal; an A/D converter for sampling the reproduced signal in synchronization with the clock signal; a determiner for determining whether a level of each of a plurality of sampled data obtained by the sampling operation is equal to or greater than a predetermined level; and a detector for detecting jitter in the reproduced signal by using predetermined ones of the plurality of sampled data based on an output from the determiner.
In one embodiment of the present invention, the determiner obtains polarity information of the sampled data.
In another embodiment, the detector detects jitter in the reproduced signal by using the sampled data substantially at a point where the polarity of the sampled data is reversed from one to another.
In still another embodiment, the detector accumulates absolute values of phase errors of the predetermined ones of the sampled data.
In still another embodiment, a signal pattern which is formed by the plurality of sampled data is detected based on the output from the determiner.
In still another embodiment, jitter for a predetermined pattern is detected by detecting the jitter when it is determined that the signal pattern is equal to the predetermined pattern.
Still another inventive apparatus of the present invention is a recording/reproduction apparatus, including: a jitter detection apparatus as described above; a recording parameter setting section for setting a recording parameter based on the jitter in the reproduced signal detected by the jitter detection apparatus; and a recording apparatus for recording digital information on the information carrier by using the recording parameter.
An inventive method of the present invention is a method for detecting asymmetry in a reproduced signal which is obtained by reproducing digital information recorded on an information carrier, the asymmetry detection method including the steps of: generating a clock signal based on the reproduced signal; sampling the reproduced signal in synchronization with the clock signal; and detecting asymmetry in the reproduced signal by accumulating selected ones of a plurality of sampled data obtained by the sampling operation.
Another inventive method of the present invention is a method for detecting jitter in a reproduced signal which is obtained by reproducing digital information recorded on an information carrier, the jitter detection method including the steps of: generating a clock signal based on the reproduced signal; sampling the reproduced signal in synchronization with the clock signal; and detecting jitter in the reproduced signal by accumulating selected ones of a plurality of sampled data obtained by the sampling operation.
Still another inventive method of the present invention is an asymmetry detection method, including the steps of: obtaining equalized outputs of multiple levels through a partial response equalization operation of a reproduced signal from an information carrier; and detecting asymmetry in the reproduced signal by accumulating one of the equalized outputs which has a maximum value and another one of the equalized outputs which has a minimum value.